EDN

Multi-port SDRAM memory controller IP core targets streaming video

London, Ontario &#151 Targeting streaming video applications, Microtronix's multi-port SDRAM memory controller IP core supports up to 1024 x 768 (true colour) 32-bit display resolution. “The core ...
EDN

Memory controller and PLL products use 65nm process technology

MOSAID Technologies Inc. has announced general availability of the industry’s first complete DDR SDRAM controller and interface IP, as well as fractional PLL IP, in leading 65nm process technology.
Ars Technica

VHDL SDRAM Controller - DQM wierdness

It's been a space since I've posted here, but I've run into a baffling problem and need some ideas. We're designing an SDRAM controller as part of an EE project and we can't seem to get the data mask ...
Electronics Weekly

Palmchip intros multi-channel DDR shared memory processor core

Palmchip Corporation has introduced a multi-channel double data rate (DDR) sharedmemory processor megacore that integrates a DDR SDRAM memory controller, up to eight32/64-bit DMA channels with ...
Computerworld

Mitsubishi Electric, Rambus ink licensing pact

JAPAN’S MITSUBISHI ELECTRIC has become the seventh memory chip maker to agree to pay royalties to Rambus for some of the most commonly used computer memory interface technologies, the Mountain View, ...