SAN JOSE — WaferMasters Inc. has developed a family of annealing ovens capable of taking up to five semiconductor wafers of 150-mm, 200-mm or 300-mm diameter. The Stacked Annealing Oven (SAO) is ...
Hybrid bonding is becoming the preferred approach to making heterogeneous integration work, as the semiconductor industry shifts its focus from 2D scaling to 3D scaling. By stacking chiplets ...
Imec has developed a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <350nm die-to-wafer overlay error, achieving good electrical yield. Such ...
UNSW researchers boosted TOPCon solar cell efficiency by locally thinning the rear poly-Si layer, reducing parasitic absorption while preserving wafer integrity. The champion cell built with this ...
Yesty, a semiconductor equipment specialist company, announced on the 20th that it is in discussions to supply high-pressure annealing equipment capable of processing 125 wafers per batch to an ...
RTP is a semiconductor manufacturing technique in which silicon wafers are heated at temperatures above 1000 o C using lasers or high-intensity lamps for a few seconds. During the cooling of the ...
The two companies say they are cooperating on the development of low temperature wafer bonding equipment and process technologies. Silicon Genesis Corp. (SiGen) and EV Group (EVG) said today they are ...
Since Q3 2021, most specialized wafer manufacturers have been mainly focusing on production of large-size wafers, while downstream cell and module manufacturers have been moving forward with the ...
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